A solid-state imaging device in the conventional art will be described with reference to FIG. 11.
In a pixel unit, unit pixels 1055 are arranged two-dimensionally. Each of the unit pixels 1055 includes a photodiode 1023, a transfer transistor (transfer gate TG) 1018, a charge detection unit (FD unit) 1017, an amplifier transistor 1056, an analog power supply terminal (AVDD1) 1040, a selection (address) transistor 1057, and a vertical signal line 1059.
Moreover, a vertical driving unit 1006 for driving the pixel unit includes a vertical register unit 1064 for sequentially selecting rows of pixels and level shift circuit units 1061, 1062, and 1063 for shifting the level of an address signal from the vertical register unit 1064, using a power supply voltage.
The level shift circuit units 1061, 1062, and 1063 respectively control the gate voltages of the selection transistor 1057, a reset transistor 1016, and the transfer transistor 1018. Specifically, the level shift circuits 1061, 1062, and 1063 respectively apply control pulses φA (for selection) 1060, φR (for reset) 1022, and φTG (for a transfer gate) 1021 to the transistors of the unit pixel 1055.
Moreover, a voltage greater than a power supply voltage DVDD1 needs to be applied to the transfer transistor 1018 and the selection transistor 1057. Therefore, the level shift circuit units 1061 and 1063 each supply a power supply voltage DVDD2 greater than DVDD1.